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28 lines
498 B
Makefile
28 lines
498 B
Makefile
# variables
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DEPEND_CFLAGS += -D__MAKEDEPEND__
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DEPEND_CPPFLAGS += -D__MAKEDEPEND__
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DEPEND_MK += $(addprefix .,$(addsuffix .dep.mk, $(OBJ)))
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# mandatory target behaviour
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all:
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ifneq ($(DEPEND_MK),)
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ifeq ($(MAKECMDGOALS),)
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-include $(DEPEND_MK)
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endif
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ifneq ($(filter all,$(MAKECMDGOALS)),)
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-include $(DEPEND_MK)
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endif
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endif
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clean: depclean my_depclean
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# convenience targets
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dep: $(DEPEND_MK)
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my_depclean:
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rm -f .*.dep.mk
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# rules
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$(DEPEND_MK): $(PREREQ_DONE)
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%.o: .%.o.dep.mk
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